Stephane Vialle Professor at CentraleSupelec (Metz and Saclay campus) PhD and HDR in Computer Science (CNU section 27) Doctoral school:  STIC - Paris Saclay University Laboratory: member of ParSys reasearch team, at LRI

Main Web Page at CentraleSupelec

Current position:

• Professor at CentraleSupelec (Metz Campus) - Computer Science
• Member of ParSys research team at  LRI
  
• Délégué à la pédagogie sur le campus de Metz de CentraleSupélec
• Co-animateur de la dominante Math - Data Science (MDS) de CentraleSupélec
  

• Short CV

Main topics of interest:

• Design of parallel algorithms and parallel applications (HPC)
• Parallel computing on hybrid architecures (ex: CPU+GPU clusters)
• High Performance Data Analytics (HPDA)
  

Research activities:

Current research projects:

• Distributed Cosimulation, in collaboration with EDF R&D in the framework of RISEGrid institute
• High Performance Data Analytics (Parsys research team - LRI)
  

Publications:

• List of my publications

Student supervisions:

• PhD Thesis
• Master Thesis and Engineering projects

Teaching activities: 

Current courses:

• Master 2 (3rd year engineer at Supelec): High Performance Computing on CPU, Supelec, Metz campus, France.
• Master 2 (3rd year engineer at Supelec): High Performance Computing on GPU, Supelec, Metz campus, France.
• Master 2 (3rd year engineer at Supelec): High Performance Computing, Supelec, Paris region campus, France.
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Activities of dissemination and scientific animation

• French PhD committees
• Conference Program committees

Organization of Scientific Manifestations:

• French scientific events
• International scientific events

Address:

Stephane Vialle

E-mail: Stephane.Vialle@centralesupelec.fr

SUPELEC
2 rue Edouard Belin
57070 Metz
FRANCE

Phone:

Fax: